On August 20, Waymo gave the first public look inside the computer that rides in its robotaxis. At the center sits a purpose-built 5nm ASIC designed in-house, delivering more than 1,000 TOPS of machine learning performance dedicated solely to the front end that receives raw camera and lidar data. It marks the point where a self-driving fleet that ran on off-the-shelf parts moves to silicon of its own.

A dedicated chip at the entrance to the raw sensor stream

The ASIC is not a general-purpose processor. It was engineered exclusively to process and fuse raw sensor data on the spot and to run neural networks on it. Specialized accelerators pull the critical information out of lidar, radar and camera streams, and the output is handed to a purpose-built inference engine that runs the sensor fusion models.

The figure of more than 1,000 TOPS for front-end processing is striking on its own, but Waymo is not pointing at peak numbers. Autonomous driving mostly runs in low-batch regimes, where each individual request is small. The company says it optimized across the full stack, software included, to maximize the performance actually achieved under those conditions.

Low-light perception benefits as well. Temporal denoising runs on the chip itself, and the latest system processes footage from 13 high-resolution cameras simultaneously and in real time, surfacing details in dark scenes that conventional cameras miss.

A design philosophy built around shaving milliseconds

Waymo lists three requirements for its onboard compute. The first is responsiveness. Driving decisions have to be made entirely in the vehicle rather than over a network, so the delay between the first pixel and the car acting on it maps directly onto safety. The company says it has scaled raw compute 20 times in eight years and, on top of that, lowered the latency distribution itself in software.

Behind this sits more than 200 million miles of fully autonomous driving. Waymo has been co-designing hardware, sensors and algorithms side by side to run what would be a respectable data center workload inside a vibrating vehicle under real-time constraints.

Two independent engines so a fault does not stop the car

The second requirement is ruggedness. Onboard computers face constant vibration and shock and swing between freezing winters and summer heat. Waymo ties its compute directly into the vehicle's liquid cooling system so that performance holds up as conditions change.

The third is redundancy. With no human available to take over, a single compute path is not an option. Waymo's onboard computer is built like two independent engines: under normal conditions both run the full workload in parallel, and if one experiences a fault, the other takes over seamlessly.

Rider experience is part of the brief as well. The architecture is ML-primary, while non-ML work such as orchestration, data movement and logging is handed to CPUs, GPUs and accelerators. That heterogeneous split is what keeps battery efficiency, trunk space and quiet operation intact.

Not going it alone, with the details due at Hot Chips

Designing your own chip sounds like vertical lock-in, but Waymo also names its outside partners: AMD, Micron, NVIDIA, SAMSUNG, Sandisk, Socionext and TSMC. The company is drawing a line between what it should build itself and where proven external technology fits better.

This announcement is an overview. The deeper technical material is scheduled for talks at Hot Chips, the semiconductor conference that opens on August 23. In a robotaxi race usually measured in fleet size and city count, the computing work underneath is finally on display.

Summary

What Waymo revealed is a 5nm ASIC specialized for raw sensor processing and the design philosophy of the onboard computer built around it. More than 1,000 TOPS for the front end alone, compute scaled 20 times in eight years, a direct tie into the vehicle's liquid cooling, and redundancy through two independent paths: each of these is reverse-engineered from the practical demands of driving with no one behind the wheel. The details are expected at the Hot Chips talks.