Meta has revealed that it is reusing older DDR4 memory pulled from decommissioned servers inside its newest DDR5-only machines. Bridging the two memory generations is a custom CXL chip that Meta designed in-house, called Vistara. With memory prices climbing worldwide, the company says the approach lets it cut the number of AI inference servers by up to 25 percent, drawing attention as a way to rein in costs without buying more hardware.

Reuse as an Answer to Soaring Memory Prices

In 2026, strong demand for AI has strained memory supply and pushed up DRAM prices. Rather than simply adding more new memory and letting costs balloon, Meta changed its approach and chose to repurpose the DDR4 left in retired servers for its latest machines.

Normally, mixing DDR4 and DDR5 in a single system causes compatibility problems and large latency penalties. Meta says it cleared that hurdle with its custom CXL 2.0 ASIC, Vistara. CXL (Compute Express Link) is a standard that connects CPUs to memory and other components at high speed over PCIe wiring, and it is well suited to expanding and sharing memory. The work was detailed in technical documents presented this week at ISCA 2026, a leading computer architecture conference.

How Vistara Lets Old and New Memory Coexist

The key to Vistara is that it does not force the slower DDR4 to sit on equal footing with the faster DDR5. On the software side, Meta treats the CXL-attached DDR4 as a "CPU-less, distinct NUMA node," kept separate from the DDR5 nodes wired directly to the processor. NUMA refers to an arrangement in which memory differs in how near, or how fast to access, it is from the CPU's point of view.

This separation makes it possible to keep frequently used data in fast DDR5 while relegating rarely touched, "cold" data to the slower DDR4 pool. In theory, that puts otherwise idle memory to work without meaningfully hurting performance. To run the older DIMMs on platforms that do not officially support them, Meta also modified the Linux CXL driver, and it says that code is either already upstream or on track to be added soon.

Vistara's own specifications are concrete as well. It bridges DDR4 memory to the host processor over a CXL 2.0/1.1-compliant PCIe Gen5 x16 interface, and it is driven by custom RISC-V processors. Each chip integrates two independent 72-bit DDR4 channels, supports speeds up to 3,200 MT/s, and handles up to 256 GB of capacity when using 64 GB DIMMs.

Server Configuration and the Savings

The new servers carrying this technology, called "MemServers," use AMD's Epyc Turin and pack 158 cores and 316 threads. Turin officially supports only DDR5, but Vistara makes it possible to attach DDR4 as well.

Each server holds 1 TB of memory in total: 768 GB of CPU-attached DDR5-6400 plus 256 GB of DDR4-2400 connected over CXL. Meta says the approach cuts its AI inference server count by up to 25 percent and reduces the extra overhead from job restarts and memory fragmentation by 33 percent.

That said, those reduction figures are numbers Meta disclosed itself. The real-world benefit will vary with the models and workloads involved, so they are worth weighing alongside independent verification.

Other Companies Tackling the Same Problem

Meta is not alone in trying to make old and new memory coexist. Panmnesia, a fabless semiconductor firm in South Korea, has also developed its own CXL controller and a CXL fabric switch with routing control, presenting its research at ISCA 2026 on June 29. The company is sampling a PCIe 6.4/CXL 3.2 "Fusion Switch" to select customers and says it is also developing a PCIe 7.0/CXL 4.0 combo IP controller that adds support for the latest CXL 4.0 features. The moves suggest that CXL-based techniques for easing the burden of memory procurement are spreading across the industry.

Summary

By calling DDR4 back into service from retired servers through the Vistara chip and OS-level management, Meta squeezed down its memory costs while limiting the hit to performance. As the memory shortage drags on into the AI era, reusing existing assets through CXL is becoming a practical lever that shapes the economics of hardware.